Showing posts with label gates. Show all posts
Showing posts with label gates. Show all posts

Half Adder and Full Adder : Logic Design Lab Experiments

Aim:
1. To design and set up a half adder using

  • (a) XOR gates and NAND gates
  • (b) NAND gates only

2. To clesign and set up a full adder using

  • (a) XOR gates and NAND gates
  • (b) NAND gates only

TTL IC PinOuts

I am adding TTL (Transistor -  Transistor Logic) IC PinOut diagrams for the ICs 7400, 7402, 7404, 7408, 7410, 7411, 7414, 7420, 7421, 7432, 7442, 7446, 7447, 7473, 7474, 7476, 7483, 7485, 7486, 7490, 7492, 7493, 7495, 74121, 74123, 74138, 74139, 74150, 74151, 74153, 74154, 74155, 74157, 74160, 74162, 74161, 74163, 74190, 74191, 74192, 74193, 74194, 74195, 7488 and 7489. This may be useful for electronics lab for engineering or poly diploma courses. I am adding it as photos here. To download it as pdf, click here.