Free download Previous year 2013 question paper for B.Tech degree examination of Switching Theory and Logic Design for third semester Computer science and engineering (CSE).
Subject : Switching Theory and Logic Design or STLD (3rd sem)
Course : BTech Engineering
Department: Computer Science and engineering (CS)
Semester: Third semester (s3)
University : MG university Kottayam kerala
Showing posts with label Logic design. Show all posts
Showing posts with label Logic design. Show all posts
Half Adder and Full Adder : Logic Design Lab Experiments
Aim:
1. To design and set up a half adder using
2. To clesign and set up a full adder using
1. To design and set up a half adder using
- (a) XOR gates and NAND gates
- (b) NAND gates only
2. To clesign and set up a full adder using
- (a) XOR gates and NAND gates
- (b) NAND gates only
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